| CMSIS-CORE Version 4.00 CMSIS-CORE support for Cortex-M processor-based devices

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MPU_Type Struct Reference

Structure type to access the Memory Protection Unit (MPU).

## Data Fields
__I uint32_t | TYPE
| Offset: 0x000 (R/ ) MPU Type Register.
__IO uint32_t | CTRL
| Offset: 0x004 (R/W) MPU Control Register.
__IO uint32_t | RNR
| Offset: 0x008 (R/W) MPU Region RNRber Register.
__IO uint32_t | RBAR
| Offset: 0x00C (R/W) MPU Region Base Address Register.
__IO uint32_t | RASR
| Offset: 0x010 (R/W) MPU Region Attribute and Size Register.
__IO uint32_t | RBAR_A1
| Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register.
__IO uint32_t | RASR_A1
| Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register.
__IO uint32_t | RBAR_A2
| Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register.
__IO uint32_t | RASR_A2
| Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register.
__IO uint32_t | RBAR_A3
| Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register.
__IO uint32_t | RASR_A3
| Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register.

## Field Documentation

__IO uint32_t MPU_Type::CTRL

__IO uint32_t MPU_Type::RASR

__IO uint32_t MPU_Type::RASR_A1

__IO uint32_t MPU_Type::RASR_A2

__IO uint32_t MPU_Type::RASR_A3

__IO uint32_t MPU_Type::RBAR

__IO uint32_t MPU_Type::RBAR_A1

__IO uint32_t MPU_Type::RBAR_A2

__IO uint32_t MPU_Type::RBAR_A3

__IO uint32_t MPU_Type::RNR

__I uint32_t MPU_Type::TYPE